The Intel 8087 FSCALE instruction, which looks on the surface like a simple power-of-two scaling operation, turns out to require over 140 micro-instructions and three levels of sub-routine calls to handle every case correctly, as Ken Shirriff’s ongoing reverse-engineering of the 8087’s microcode now reveals.
What the Opcode Collective Found Inside the 8087
Shirriff is part of a group called the Opcode Collective, which has been systematically reverse-engineering the microcode of Intel‘s 8087 floating point unit co-processor. The project has now reached the point where the group can trace exactly how that microcode implements individual x87 instructions, and the Intel 8087 FSCALE instruction has proved to be one of the more illuminating examples of how much work the chip quietly shoulders.
FSCALE’s job, as any programmer who used it on a 286-era machine might recall, is to scale a floating point number by a power of two. You hand it a value and an integer exponent, and it does the arithmetic. That sounds like a handful of steps at most. The reality inside the 8087 is considerably more involved, spanning loading values into registers, performing the core arithmetic, checking for error conditions, and managing the chip’s internal stack, all before a result is ever handed back to the host processor.
Shirriff’s annotated die shot, published on his blog, highlights every functional block the 8087 calls upon to execute this one instruction. Seeing those blocks laid out makes the scale of the operation concrete in a way that a microcode listing alone cannot quite convey.
CISC Philosophy in Silicon: Robustness Over Simplicity
The structure of the Intel 8087 FSCALE instruction’s implementation mirrors the broader CISC-style philosophy of the x86 family it was designed to accompany. A single high-level instruction expands into a sequence of internal steps, each handling a specific concern, so the developer writing assembly or relying on a compiler never has to worry about edge cases, denormal numbers, or stack discipline. The chip absorbs that complexity.
What makes this particularly interesting from a hardware history perspective is how logical the decomposition is once you can see it. There is nothing baroque about it. Each sub-routine call addresses a genuine requirement: a case that would produce a wrong or undefined result if left unhandled. The three levels of sub-routine calls are not excess, they are the price of correctness across the full range of floating point inputs the instruction might legally receive.
For anyone who spent time in the late 1980s coaxing numerical code out of a PC with an 8087 fitted to the co-processor socket, it is worth pausing on how much engineering was concentrated in that ceramic package. The chip was designed to be mathematically rigorous at a time when rigour in floating point hardware was far from universal.
The Road to IEEE 754
That rigour had lasting consequences. The 8087’s approach to floating point arithmetic fed directly into the development of the IEEE 754 floating point standard, which went on to govern how virtually every subsequent processor handles floating point numbers. The fact that a chip priced to fit into an affordable personal computer of that era was mathematically careful enough to become the template for an international standard says something about the ambition of its designers.
The Opcode Collective’s work is ongoing, and the FSCALE analysis is one stage in a broader effort to document the full microcode of the 8087. Each instruction decoded adds to a picture of how Intel’s engineers in the late 1970s built a floating point unit that proved more durable, in terms of its influence, than almost any other piece of silicon from that generation. The group’s detailed breakdown of FSCALE, with the annotated die imagery and the full micro-instruction trace, is available on Shirriff’s blog at righto.com.
